So-called wafer bonding, involving the creation of electrically conductive connections between the circuits (chips) in two semiconductor wafers prior to separation, i.e., between two complete wafers, has established itself as one of the assembly techniques used in semiconductor technology. The term “face-to-face technology” as used in the following, is intended to mean the positioning of two wafers with respect to one another with the active faces of the integrated circuits facing one another and the connections being established in this state.
The following techniques are known in the field of these face-to-face technologies:
wafer bonding via diffusion soldering (e.g., with the Cu—Sn or Au—Sn solder combination),
wafer bonding via anodic bonding,
wafer bonding via conductive adhesive connections,
wafer bonding via plug and clip connections (e.g., by insertion of Au stud bumps in via holes), and
wafer bonding via friction welding connections.
These techniques are known to those skilled in the art as such and therefore do not require any further explanation (also, details are not relevant to an understanding of the present invention).
One common characteristic of all these techniques is the need to maintain a high degree of coplanarity between the mutually opposite wafers during the entire joining process. This calls for great complexity of the adjustment and fixing facilities and therefore increases the cost of the relevant processes. Additionally, high pressures are often needed to produce the wafer-to-wafer bond, therefore posing the risk of breaking a wafer or of damaging subsystems on the wafer or even of components in the manufacturing fixture.